46 RFID Handbook: Applications, Technology, Security, and Privacy
The controller FSM is generated to detect different sequences of features for each
encoded bit in a similar manner as a numeric sequence detector. For example, if there is
a rising edge between the samples, it is a 0, a falling edge indicates a 1, and a constant level
high is a 0. Both versions of 0 can be checked against the previous value.
For a PIE encoding (Figure 3.7a) there are three sampling points to consider. This is
demonstrated for the ?¬?rst description for each 0 and 1 from Figure 3.8. According to the
description, a falling edge occurs between 2.9 and 4.2 ms making this an invalid detection
region. Thus for a 0 the sampling points are 1.45 and 5.225 ms. Because the period is not
?¬?xed for a 1 and the invalid detection region and period completion time overlap,
the system can move into active sampling mode. Because a falling edge has not occurred
by 4.2 ms, one must occur between 6.1 and 10.5 ms. Therefore a timer indicates when 6.1 ms
have elapsed, and then the FSM looks for an edge before a timer indicates 10.5 ms. Finally,
on seeing a second edge, the FSM begins a new bit window.
The process for encoding these values into the appropriate encoding is a much simpler
subset of the detection process. The process requires a parallel-to-serial block complementary
to the serial-to-parallel block.
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