By virtue of the fact that C is a signi?¬?cant and universally known language compared
with hardware description languages, the primitive behaviors are speci?¬?ed in C in the case
of a target described with VHDL. Therefore, the C code must be converted to a readily
synthesizable hardware code.
declarations
DR(1)
M(2)
TRext(1)
Sel(2)
Session(2)
Target(1)
Q(4)
CRC-5(5)
RN16(16)
RN(16)
PC(16)
EPC(16)
CRC-16(16)
MemBank(2)
WordPtr(8)
Data(16)
Header(1)
main
query
(4,4) DR M TRext Sel Session Target Q CRC-5
RN16
ack(2,1) RN
PC EPC CRC-16
req_rn(8,193) RN CRC-16
RN CRC-16
write(8,195) MemBank WordPtr Data RN CRC-16
RN CRC-16
RN16 ??
inventoryFlag ??
current_state ??
...
FIGURE 3.23
Template generated for Query command.
FIGURE 3.22
Macros speci?¬?cation.
Design Automation for RFID Tags and Systems 51
During the hardware conversion, the C code is converted into a control and data ?¬‚ow
graph (CDFG). Compilers commonly use CDFGs to perform optimizations and transformations.
Typically, behavioral synthesis tools will also use CDFGs as an internal representation
[31]. In many cases, the control dependencies present in a CDFG create cycle
boundaries during high-level synthesis.
In contrast, in the RFID compiler the CDFG is transformed into an entirely combinational
representation by the SuperCISC compiler. The result is a super data ?¬‚ow graph
(SDFG).
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