Although the transceiver power dominates the power consumption in active tags, the
controller power consumption is also a signi?¬?cant consideration.
3.4.4.1 RFID Compiler Prototype Targets
The prototype microprocessor-based system is composed of an Altera Apex FPGA prototyping
board used for logic buffering the packets from the air interface, 16 bit EISC
Q 1
2
2
2
2
2
2
2
2 S
S S S
S
S
S S S
1
1
1
1 1
1 1
1
S
S
2
!
!
1
1
1 0
2
2 2
2
2
2
2
2 66
2
2
2
S
2
2 S1 1
1 1
1 1
current_state
2 2
2
1 S
target target_var
2 1
sel_var sel
==
== ==
==
== ==
mux
mux
mux
mux mux
mux mux
mux
mux
mux
mux
mux
mux
mux
65
65 66 inventoryFlag
Basic block 0
current_state inventoryFlag RN16
1
1
1
S 1
1
==
==
==
RN16 last_session session
mux 5 1
2
5 !=
!=
4
2
1
1
1
??“ 2 3
rand 0
1 <<
FIGURE 3.25
SDFG for the Query command.
Design Automation for RFID Tags and Systems 53
microprocessor development board from AD Chips [35], and a custom development board
created at the University of Pittsburgh for the active air interface.
The prototype FPGA-based system uses a Spartan 3 FPGA development board from an
Opal Kelly for the controller logic and any buffering logic that is required for the tag. For
this prototype, the air interface is an off-the-shelf ultra high frequency (UHF) transceiver
connected to the FPGA board through a custom board created at the University of
Pittsburgh.
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