TABLE 3.7
Area and Dynamic Power for Implementing the ISO 18185 Part 1 Primitive Logic on a 0.16 mm ASIC
Prims 1 2 3 4 5 6 7 8 9 10
Area 0.7171 0.7284 0.7398 0.7678 0.7779 0.8125 0.8349 0.8509 0.8664 0.8815
Power 0.0338 0.0371 0.0379 0.0381 0.0382 0.0382 0.0383 0.0384 0.0385 0.0386
Note: ASIC area is 100 mm2. Dynamic power is in milliWatts. Quiescent power <0.4 mW.
62 RFID Handbook: Applications, Technology, Security, and Privacy
The RFID compiler and design automation ?¬‚ows allow comparison of different con?¬?gurations
of the tag and the impact on area and power for microprocessor or ASIC tag
implementations. The design automation ?¬‚ow also allows for evaluating interrogator=tag
complexity with respect to different protocols and encodings.
References
1. American National Standards Institute, ??????ANSI NCITS 236:2001.??™??™ Standard Speci?¬?cation, 2002.
2. International Standards Organization, ??????ISO=IEC FDIS 18000-7:2004(E).??™??™ Standard Speci?¬?cation,
2004.
3. X. Gao, Z. Xiang, H. Wang, J. Shen, J. Huang, and S. Song, ??????An approach to security and privacy
of RFID system for supply chain,??™??™ Proceedings of 2004 IEEE International Conference on E-Commerce
Technology for Dynamic E-Business, pp. 164??“168, September 2004.
4. P. Blythe, ??????RFID for road tolling, road-use pricing and vehicle access control,??™??™ IEE Colloquium on
RFID Technology, October 1999.
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