34. A.K. Jones, R. Hoare, D. Kusic, G. Mehta, J. Fazekas, and J. Foster, ??????Reducing power while
increasing performance with SuperCISC,??™??™ ACM Transactions on Embedded Computing Systems
(TECS), 5, 1??“29, August 2006.
35. Y. Cha, ??????EISC core,??™??™ Presentation to University of Pittsburgh, February 2005.
36. A.K. Jones, R.R. Hoare, S.R. Dontharaju, S. Tung, R. Sprang, J. Fazekas, J.T. Cain, and
M.H. Mickle, ??????A ?¬?eld programmable RFID tag and associated design ?¬‚ow,??™??™ Proceedings of
FCCM, pp. 165??“174, 2006.
37. A.K. Jones, R. Hoare, S. Dontharaju, S. Tung, R. Sprang, J. Fazekas, J.T. Cain, and M.H. Mickle,
??????An automated, FPGA-based recon?¬?gurable, low-power RFID tag,??™??™ Proceedings of the 43rd Design
Automation Conference (DAC), pp. 131??“136, ACM, July 2006.
38. A.K. Jones, R. Hoare, S. Dontharaju, S. Tung, R. Sprang, J. Fazekas, J.T. Cain, and M.H. Mickle,
??????An automated, FPGA-based recon?¬?gurable, low-power RFID tag,??™??™ Journal of Microprocessors and
Microsystems, 31, 116??“134, March 2007.
39. Sim-panalyzer, ??????SimpleScalar-ARM power modeling project,??™??™ http:==www.eecs.umich.edu=
panalyzer
40. C. Gilberto, M. Martonosi, J. Peng, R. Ju, and G. Lueh, ??????XTREM: A power simulator for the Intel
XScale core,??™??™ Proceedings of ACM LCTES, 2004.
41. J. Russell and M. Jacome, ??????Software power estimation and optimization for high performance,
32-bit embedded processors,??™??™ Proceedings of ICCD, 1998.
Pages:
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147