This ensures
that the chip receives the most amount of power possible when the tag is furthest from the
powering RF wave.
As illustrated in Figure 4.7, the input impedance of an RFID chip at the threshold of
operation (minimum input sensitivity) is capacitive. The input impedance of an RFID IC
can be modeled as indicated in Figure 4.8 as a series equivalent circuit or a parallel
equivalent circuit. Depending on the fabrication technology and the IC design, the typical
impedance of RFID ICs will vary. Some of the typical values expected are listed, using the
series equivalent circuit in Figure 4.8b, Zc??Rseries??(1=jvCseries), as follows.
. 17 ??“ 149j V at 915 MHz (EPC Class I Gen I IC offered from Alien Technology,
R??1300 V, C??1.5 pF)
. 36 ??“ 117j V at 866.5 MHz (EPC Class I Gen 2 from Impinj (registered trademark of
Impinj Inc., Seattle, Washington) (Impinj, 2005)
. 33 ??“ 112j V at 915 MHz (EPC Class I Gen 2 from IMPINJ) (Impinj, 2005)
Junction
capacitance
Bypass and
reservoir
capacitance
Antenna terminals
DC output line
Logic circuits
jXB
jXl
Rl
FIGURE 4.7
A simpli?¬?ed RFID label IC schematic. (From Ranasinghe, D.C., Leong, K.S., Ng, M.L., and Cole, P.H., IEEE 2005
International Workshop on Antenna Technology: Small Antennas and Novel Metamaterials, New York, USA, 2006,
2005 by IEEE. With permission.)
FIGURE 4.
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