These signals are then
converted in a narrow-band analog-to-digital converter (ADC). In UHF, for example, FCC
regulations limit the total bandwidth to 25 MHz while the channel bandwidth is about
500 kHz. A reader therefore can handle more than 50 channels.
If the ADC is moved closer to the antenna, more components can be shared for all
channels and more of the signal processing can be done in software (Figure 5.2). This
means that the hardware cost can be substantially reduced. An ideal software radio would
consist of an antenna, one ADC that samples directly on the antenna signal, one digital-toanalog
converter (DAC) that generates the outgoing antenna signal in the transceiver and a
DSP. All the signal processing should then be done in software in the DSP. This ideal
situation, however, is not feasible or very expensive with today??™s technology.
RF
filter
Ant
RF/BB
conversion
BB
filter
User
FIGURE 5.1
Simpli?¬?ed hardware chain of a traditional RFID reader.
RF
filter
Ant
Decimating LPF
ADC
I
Q
DSP
I
Q
Digital Osc
cos(wt ) sin(wt )
Microcontroller
Ethernet Serial ROM RAM
FIGURE 5.2
Simpli?¬?ed hardware and software chain of the SDLR receiver.
Contemporary RFID Reader Architecture 97
There are other advantages with a software radio architecture, besides the hardware
reduction. A software radio reader could be recon?¬?gured without replacing any hardware.
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