For instance, tags working within the EPC Global Generation 2 speci-
?¬?cations can be asked to reply at a subcarrier frequency ranging from 40 up to 620 kHz.
Therefore, the reader must be able to be easily recon?¬?gured to support frequency bands and
protocols of different geographical regions and those that will become available in the future.
5.2.2 Hardware Design
This section concerns the design and development of the hardware for a software-based
data logging reader. The prototype instrument developed for this project is called software
data logging reader (SDLR). It features a ColdFire network processor, which enables
it to perform high-speed data processing. It runs on an embedded Linux operating system
and comes with a number of PC-like functions built in that enable it to run additional
applications simultaneously. Additionally, it supports standard network protocols including
DHCP, UDP=IP over Ethernet, 820.11x (Wi-Fi), HTTP, and SNMP, and its superior
network adaptability enables its software to be easily implemented from remote sites.
The general setup of the implemented SDLR transceiver is shown in Figure 5.3. In the
following sections we discuss various considerations that led to its particular design.
A detailed description of the overall system and its individual components are also given.
5.2.3 Microcontroller
The microcontroller block is based on ColdFire, MC5407C3 Integrated Processor from
Freescale Semiconductor.
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