SEARCH
0-9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Prev | Current Page 393 | Next

Syed A. Ahson and Mohammad Ilyas

"RFID Handbook: Applications, Technology, Security, and Privacy"

8 9.0 9.20 9.4 9.6
FIGURE 11.9
Peak current reduction from memory banking.
206 RFID Handbook: Applications, Technology, Security, and Privacy
in supply current because the power-enable transistor is turned on causing the internal
memory block node capacitances to draw current from the supply. With delays lower than
30 ms, the power-enable transistors do not turn on very much and draw a much lower
current.
As noted earlier, the memory blocks were arranged into banks and a multiplexer was
used to tie the banks together (see Figure 11.7). In our implementation, we chose 16 banks,
each containing 22,200 byte memory blocks, thus the entire system contains 352 memory
blocks. Compared with the nonbanked approach, the reduction in average power is
signi?¬?cant. The banking approach saves approximately 43% decreasing the power for
the memory blocks from 11.8 to 6.7 mW. The overall power savings from the architectural
approach is 98.7%, as shown in Table 11.2.
11.3 Power Macromodeling for RFID Protocols
RFID protocols are typically designed without taking into account many of the impacts of
their ?¬?nal implementation. For example, the design of a protocol can signi?¬?cantly impact
25.0
Transient response
Supply Current (35?µ) Supply Current (40?µ) Supply Current (26?µ) Supply Current (28?µ) Supply Current (30?µ)
0 26 ?µs
28 ?µs
30 ?µs
35 ?µs
40 ?µs
??’25.


Pages:
381 382 383 384 385 386 387 388 389 390 391 392 393 394 395 396 397 398 399 400 401 402 403 404 405