The SystemC hardware blocks generated in the ?¬?rst phase are instantiated in the design for
the complete tag simulator. Trace instructions are added to the design, which save information
about the functional units associated with changing signal values. The simulator is
made by compiling the SystemC design.
11.3.4 Power Estimation
The power macromodeling ?¬‚ow automatically generates probabilistic input test vectors
for use in the tag simulation. It uses the Markov chain-based sequence generator, discussed
in Section 11.3.2, to generate test vectors with p, d, and s values that are evenly distributed
in the three-dimensional space. Since the actual commands issued by the RFID reader may
be unknown at the time of simulation, sequences with all possible statistics are applied to
the tag simulation. However, while designing tags for a given RFID system, the user may
be able to predetermine the expected workloads generated by the RFID reader. The user
can use these input vectors instead of the probabilistic vectors for designing tags that are
power optimized for the actual workloads.
When the simulation is executed, a trace ?¬?le is generated with the program execution
statistics. If the signal values at a functional unit change, a trace instruction records the
unit??™s identi?¬?cation number and its signal values. During power estimation, each trace
instruction is read and the module power is constructed behaviorally.
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