These counters are running with the smart buffer system clock at 33 MHz. Therefore,
the preamble signal will be skewed less than 1 ms requiring the reader to tolerate an error
of ??/ 3.3%.
In order to help the receiver ?¬?lter out an ambient noise in the air, a mark state, or a stable
logic low signal for 120 ms is generated and transmitted just before the preamble signal.
While the preamble generator creates the mark state and preamble signal, the air interface
unit forces the rx_enable signal low and raises the tx_enable signal.
When the ?¬?nal sync pulse is transmitted, the preamble generator informs the Manchester
encoder to begin to output its serial-encoded data immediately. Any signi?¬?cant gap
between data and the preamble signal may cause an error, which may not be tolerated
in the system.
11.4.2.8 Manchester Encoder
The Manchester encoder starts encoding the data in the input FIFO after it is noti?¬?ed by the
preamble generator. This noti?¬?cation occurs during the transmission of the ?¬?nal sync pulse
to give the encoder enough time to have the ?¬?rst byte of data ready. First, the Manchester
encoder converts the next available byte in the FIFO to eight (8) single serial bits. Those
eight (8) bits are individually stored in single-bit shift registers. In addition, a stop bit needs
to be appended for each byte of data in the shift registers.
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